level of 1.0 V. LOGIC SYMBOL (Pinout A only) ORDERING CODE: See Section 9 ed COMMERCIAL GRADE MILITARY GRADE PIN PKG | 4 PKGS OUT Voc = +5.0 V 5%, Vec = +5.0 V +10%, TYPE wo ) D a7rF- 13 Ta =0C to+70C | Ta =-55C to +125C 9{ CP Q7fo 14 Plastic , DIP (P) A 7491APC 9A Ceramic : A 7491ADC 7491ADM 6A Voc = Pin 5 DIP (D) GND = Pin 10 Flatpak B |7491AFC 7491AFM 3I INPUT LOADING/FAN-OUT: See Section 3 for U.L. definitions 54/74 (ULL.) PIN NAMES . DESCRIPTION HIGH/LOW A,B Serial Data Inputs 1.0/1.0 cP Clock Pulse Input (Active Rising Edge) 4.0/1.0 Q7 Data Output 10/10 G7 Complementary Data Output 10/10 . OF YH - 1146 -07 a4 OF YI - 1xhe aa te NATIONAL SEMICOND {LOGIC} O2E D Bf eso1ne2 ooLa744 8 i V- VC -OF -057 FUNCTIONAL DESCRIPTION Single-rail data and input control are gated through inputs A and B and an in- ternal inverter to form the complementary inputs to the first bit of the shift register. Drive for the internal com- mon clock line is provided by an inverting clock driver. Each of the inputs (A,
e [2] [13] a nc LB] [12] A Voc [4] AI}GND ne [5 i] 8 ne [6] [3]cr nc [7] [s}Nc LOGIC SYMBOL (Pinout A only) PIN COMMERCIAL GRADE MILITARY GRADE PKG PKGS Voc = +5.0 V +5%, Voc = +5.0 V +10%, OUT) = t,=0C to +70C | Ta =-55C to +125 | TYPE Piastic DIP (P}) A 7491APC 9A ceramic | a | 74g1aDc 7491ADM 6A Voc = Pin 5 DIP (D) GND = Pin 10 Flatpak B | 7491AFC 7491AFM 31 INPUT LOADING/FAN-OUT: See Section 3 for U.L. definitions 54/74 (ULL.) PIN NAMES DESCRIPTION HIGH/LOW A,B Serial Data Inputs 1.0/1.0 CP Ciock Pulse Input (Active Rising Edge) 1.0/1.0 Q7 Data Output 10/10 G7 Complementary Data Output 10/10 4-114 91 FUNCTIONAL DESCRIPTION Single-rail data and input control are gated through inputs A and B and an in- ternal inverter to form the complementary inputs to the first bit of the shift register. Drive for the internal com- mon clock line is provided by an inverting clock driver. Each of the inputs (A, B, and CP) appear as only one TTL input load. The clock pulse inverter/driver causes these circuits